Slide7 - teriphic name

Fabrication and assembly automation of TERabit optical transceivers

based on InP EML arrays and a Polymer Host platform for optical InterConnects up to 2 km and beyond
Slide3 - 880 and 1.6 with 100g lamda

800Gb/s and 1.6Tb/s with 100G/lamda

using arrayed components with 8x and 16x lanes
Slide1 - assembly automation of terabit

Assembly automation of Terabit transceivers

using arrayed components and custom processes

About TERIPHIC project

Efforts to develop optical interfaces with Terabit capacity for datacom applications have kicked off. A practical path to the Terabit regime is to scale the current 400G modules, which are based (in the most forward looking version of the standards) on 4 parallel lanes, each operating with PAM-4 at 53 Gbaud. Scaling these modules by adding lanes looks simple, but entails challenges with respect to the fabrication and assembly complexity that can critically affect their manufacturability and cost. TERIPHIC aims to address these challenges by leveraging photonic integration concepts and developing a seamless chain of component fabrication, assembly automation and module characterization processes as the basis for high-volume production lines of Terabit modules.

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Slide 1
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Slide 1 - copy
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